/* ---------------------------------------------------------------------------- */
/*                  Atmel Microcontroller Software Support                      */
/*                       SAM Software Package License                           */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation                                        */
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/* All rights reserved.                                                         */
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/* modification, are permitted provided that the following condition is met:    */
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/* this list of conditions and the disclaimer below.                            */
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/* this software without specific prior written permission.                     */
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/* ---------------------------------------------------------------------------- */

#ifndef _SAM_ICM_INSTANCE_
#define _SAM_ICM_INSTANCE_

/* ========== Register definition for ICM peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  #define REG_ICM_CFG                       (0x40048000U) /**< \brief (ICM) Configuration Register */
  #define REG_ICM_CTRL                      (0x40048004U) /**< \brief (ICM) Control Register */
  #define REG_ICM_SR                        (0x40048008U) /**< \brief (ICM) Status Register */
  #define REG_ICM_IER                       (0x40048010U) /**< \brief (ICM) Interrupt Enable Register */
  #define REG_ICM_IDR                       (0x40048014U) /**< \brief (ICM) Interrupt Disable Register */
  #define REG_ICM_IMR                       (0x40048018U) /**< \brief (ICM) Interrupt Mask Register */
  #define REG_ICM_ISR                       (0x4004801CU) /**< \brief (ICM) Interrupt Status Register */
  #define REG_ICM_UASR                      (0x40048020U) /**< \brief (ICM) Undefined Access Status Register */
  #define REG_ICM_DSCR                      (0x40048030U) /**< \brief (ICM) Region Descriptor Area Start Address Register */
  #define REG_ICM_HASH                      (0x40048034U) /**< \brief (ICM) Region Hash Area Start Address Register */
  #define REG_ICM_UIHVAL                    (0x40048038U) /**< \brief (ICM) User Initial Hash Value 0 Register */
  #define REG_ICM_ADDRSIZE                  (0x400480ECU) /**< \brief (ICM) Address Size Register */
  #define REG_ICM_IPNAME                    (0x400480F0U) /**< \brief (ICM) IP Name 1 Register */
  #define REG_ICM_FEATURES                  (0x400480F8U) /**< \brief (ICM) Feature Register */
  #define REG_ICM_VERSION                   (0x400480FCU) /**< \brief (ICM) Version Register */
#else
  #define REG_ICM_CFG      (*(__IO uint32_t*)0x40048000U) /**< \brief (ICM) Configuration Register */
  #define REG_ICM_CTRL     (*(__O  uint32_t*)0x40048004U) /**< \brief (ICM) Control Register */
  #define REG_ICM_SR       (*(__O  uint32_t*)0x40048008U) /**< \brief (ICM) Status Register */
  #define REG_ICM_IER      (*(__O  uint32_t*)0x40048010U) /**< \brief (ICM) Interrupt Enable Register */
  #define REG_ICM_IDR      (*(__O  uint32_t*)0x40048014U) /**< \brief (ICM) Interrupt Disable Register */
  #define REG_ICM_IMR      (*(__I  uint32_t*)0x40048018U) /**< \brief (ICM) Interrupt Mask Register */
  #define REG_ICM_ISR      (*(__I  uint32_t*)0x4004801CU) /**< \brief (ICM) Interrupt Status Register */
  #define REG_ICM_UASR     (*(__I  uint32_t*)0x40048020U) /**< \brief (ICM) Undefined Access Status Register */
  #define REG_ICM_DSCR     (*(__IO uint32_t*)0x40048030U) /**< \brief (ICM) Region Descriptor Area Start Address Register */
  #define REG_ICM_HASH     (*(__IO uint32_t*)0x40048034U) /**< \brief (ICM) Region Hash Area Start Address Register */
  #define REG_ICM_UIHVAL   (*(__O  uint32_t*)0x40048038U) /**< \brief (ICM) User Initial Hash Value 0 Register */
  #define REG_ICM_ADDRSIZE (*(__I  uint32_t*)0x400480ECU) /**< \brief (ICM) Address Size Register */
  #define REG_ICM_IPNAME   (*(__I  uint32_t*)0x400480F0U) /**< \brief (ICM) IP Name 1 Register */
  #define REG_ICM_FEATURES (*(__I  uint32_t*)0x400480F8U) /**< \brief (ICM) Feature Register */
  #define REG_ICM_VERSION  (*(__I  uint32_t*)0x400480FCU) /**< \brief (ICM) Version Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */

#endif /* _SAM_ICM_INSTANCE_ */
